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july 2008 rev 3 1/12 12 STW75NF30 n-channel 300 v, 0.037 ? , 60 a, to-247 low gate charge stripfet? power mosfet features exceptional dv /dt capability low gate charge 100% avalanche tested application switching applications description this power mosfet series realized with stmicroelectronics unique stripfet? process has specifically been designed to minimize input capacitance and gate charge. it is therefore suitable as primary switch in advanced high- efficiency isolated dc-dc converters figure 1. internal schematic diagram type v dss r ds(on) max i d p w STW75NF30 300 v < 0.045 ? 60 a 320 w to-247 1 2 3 www.st.com table 1. device summary order code marking package packaging STW75NF30 75nf30 to-247 tube
contents STW75NF30 2/12 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STW75NF30 electrical ratings 3/12 1 electrical ratings table 1. absolute maximum ratings symbol parameter value unit v ds drain-source voltage (v gs = 0) 300 v v gs gate-source voltage 20 v i d drain current (continuous) at t c = 25 c 60 a i d drain current (continuous) at t c = 100 c 37.8 a i dm (1) 1. pulse width limited by safe operating area drain current (pulsed) 240 a derating factor 2.56 w/c dv/dt (2) 2. i sd 60a, di/dt 200a/s, v dd 80% v (br)dss peak diode recovery voltage slope 12 v/ns p tot total dissipation at t c = 25 c 320 w t j tstg operating junction temperature storage temperature -55 to 150 c table 2. thermal resistance symbol parameter value unit r thj-case thermal resistance junction-case max 0.39 c/w r thj-amb thermal resistance junction-ambient max 50 c/w t l maximum lead temperature for soldering purpose 300 c table 3. avalanche characteristics symbol parameter max. value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 50 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 400 mj
electrical characteristics STW75NF30 4/12 2 electrical characteristics (t case =25c unless otherwise specified) table 4. on/off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1 ma, v gs = 0 300 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating, v ds = max rating @125 c 1 10 a a i gss gate body leakage current (v ds = 0) v ds = 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 3 4 v r ds(on) static drain-source on resistance v gs = 10 v, i d = 30 a 0.037 0.045 ? table 5. dynamic symbol parameter test conditions min. typ. max. unit g fs (1) 1. pulsed: pulse duration = 300s, duty cycle 1.5% forward transconductance v ds = 15 v , i d = 30 a 40 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25 v, f = 1 mhz, v gs = 0 5930 837 110 pf pf pf c oss eq. (2) 2. c oss eq. is defined as a constant equivalent capacitanc e giving the same charging time as coss when v ds increases from 0 to 80% v dss equivalent output capacitance v ds = 0 to 240 v, v gs = 0 462 pf r g intrinsic gate resistance f = 1 mhz open drain 1.55 ? q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 240 v, i d = 30 a, v gs = 10 v (see figure 15) 164 36 69 nc nc nc
STW75NF30 electrical characteristics 5/12 table 6. switching times symbol parameter test conditions min. typ. max. unit t d(on) t r t d(off) t f turn-on delay time rise time turn-off delay time fall time v dd = 150 v, i d = 30 a r g = 4.7 ? , v gs = 10 v, (see figure 14) 115 87 141 101 ns ns ns ns table 7. source drain diode symbol parameter test conditions min. typ. max. unit i sd i sdm (1) 1. pulse with limited by maximum temperature source-drain current source-drain current (pulsed) 60 240 a a v sd (2) 2. pulsed: pulse duration = 300s, duty cycle 1.5% forward on voltage i sd = 60 a, v gs = 0 1.6 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 60 a,v dd = 60 v di/dt = 100 a/s (see figure 19) 252 2.5 20 ns c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd =60 a, v dd = 60 v di/dt = 100 a/s t j = 150c (see figure 19) 316 3.7 23.2 ns c a
electrical characteristics STW75NF30 6/12 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. normalized bv dss vs temperature figure 7. static drain-source on resistance i d ( a ) 10 2 10 1 10 0 10 -1 10 -1 10 0 10 1 10 2 v d s (v) 10 s 100 s 1m s 10m s oper a tion in thi s a re a i s limited b y m a x r d s (on) am00116v1 i d ( a ) 120 100 8 0 60 10 20 v d s (v) 140 160 40 20 1 8 0 4v 5v 6v 0 v g s =10v am00117v1 i d ( a ) 120 100 8 0 60 2 v g s (v) 140 160 40 20 1 8 0 46 0 am0011 8 v1 -75 -50 -25 025 50 75 100 125 150 t j (c) bv d ss 1.15 1.0 0.9 0. 8 (norm) 0. 8 5 0.95 1.05 am00124v1 r d s (on) ( ) 0.0 33 5 0.0 3 4 0.0 3 45 0.0 3 5 5 10 15 20 25 3 0 i d (a) am00122v1
STW75NF30 electrical characteristics 7/12 figure 8. gate charge vs gate-source voltage figure 9. capacitance variations figure 10. normalized gate threshold volatge vs temperature figure 11. normalized on resistancevs temperature figure 12. source-drain diode forward characteristics figure 13. maximum avalanche energy vs temperature v g s ( v ) 8 6 4 2 50 100 150 200 q g (nc) 10 12 v dd =240v i d =60a v g s =10v 0 am00119v1 c ( pf ) 10 4 10 3 10 2 10 1 10 -1 10 0 10 1 10 2 v d s (v) ci ss co ss cr ss am00120v1 -75 -50 -25 025 50 75 100 125 150 t j (c) v g s (th) 1.1 0.9 0.7 0.5 (norm) 0.6 0. 8 1.0 am00125v1 r d s (on) 2.5 2.0 1.5 1.0 0.5 0 -75 -50 -25 025 50 75 100 125 150 t j (c) am00126v1 v d s (v) 0.4 0.5 0.6 0.7 0. 8 0.9 0 10 20 3 04050 60 i s d (a) 25c 150c t j =-50c am0012 3 v1 e a s ( mj ) 0 50 100 150 0 3 0 60 90 120 t j (c) 200 250 3 00 3 50 400 am00121v1
test circuits STW75NF30 8/12 3 test circuits figure 14. switching times test circuit for resistive load figure 15. gate charge test circuit figure 16. test circuit for inductive load switching and diode recovery times figure 17. unclamped inductive load test circuit figure 18. unclamped inductive wavefo rm figure 19. switching time waveform
STW75NF30 package mechanical data 9/12 4 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com
package mechanical data STW75NF30 10/12 dim. mm. min. typ max. a4. 8 55.15 a1 2.20 2.60 b 1.0 1.40 b 1 2.0 2.40 b 2 3 .0 3 .40 c0.40 0. 8 0 d1 9 . 8 5 20.15 e 15.45 15.75 e5.45 l 14.20 14. 8 0 l1 3 .70 4. 3 0 l2 1 8 .50 ?p 3 .55 3 .65 ?r 4.50 5.50 s 5.50 to-247 mechanical data
STW75NF30 revision history 11/12 5 revision history table 8. document revision history date revision changes 23-oct-2007 1 first release 27-may-2008 2 new value inserted in table 5: dynamic 15-jul-2008 3 document status promoted from preliminary data to datasheet
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